1. Field of the Invention
The present invention refers to a control device for a switching voltage regulator.
2. Description of the Related Art
Switching voltage regulators are known in the prior art. A switching voltage regulator of the buck/boost type is shown in FIG. 1. The regulator of FIG. 1 works by voltage switching and comprises a first half-bridge 1, consisting of a high side switch 11 and a low side switch 12 driven by a driving device 13, located between an input voltage Vi and electrical ground GND, and a second half-bridge 2, consisting of a high side switch 21 and a low side switch 22 driven by a driving device 23, located between an output voltage and electrical ground GND. The output voltage Vo is applied across an electrical load LOAD. The regulator comprises an error integration block comprising an error operational amplifier 31 suitable for detecting the error between a voltage proportional to the output voltage Vo, expressed as K*Vo, and a reference voltage Vref; the output of the error operational amplifier 31 is connected to a compensation network consisting of a series of resistances R and a capacitor C that makes it possible to integrate in time the error provided by the amplifier 31. The integrated error e1 is sent in input to a pulse-width modulated (PWM) generator 40 which also has in input the signal produced by a triangular wave generator 41; the PWM generator 40 is suitable for generating two signals which are sent to the driving circuits 13, 23 to drive appropriately the half-bridges 1 and 2. An inductance L is located between the half-bridges 1 and 2.
The triangular wave generator 41 determines the frequency at which the system works. If we indicate with duty cycle D the percentage of period in which the high side of a half-bridge is on, the regulated output voltage Vo is related to the input voltage by the relation Vo/Vi=Di/Do where Di is the duty cycle of the half-bridge 1 and Do is the duty cycle of the half-bridge 2.
The average current in the inductance II is given by II=Iload/Do where Iload is the current on the load and the duty cycles Do and Di are obtained by comparing the integrated error e1 with the triangular wave coming from the generator 41; the latter component provides a triangular wave proportional to the input voltage Vi.
A simple way to drive the half-bridges 1 and 2 is to make Do=1−Di, in other words to drive the half-bridge 2 with a signal complementary to the half-bridge 1. This gives the following relations:
                    Vo        Vi            =              Di                  1          -          Di                      ;        Il    =                  Iload                  1          -          Di                    =                        Iload          ⁡                      (                          1              +                              Vo                Vi                                      )                          .            
In this case there is considerable loss on the series resistance of the inductance L which is proportional to the average current flowing through it. Maximizing the duty cycle of the half-bridge 2 would allow one to reduce this current. The optimum solution is obtained by letting Do=1 during the buck state and letting Di=1 during the boost state. This situation also makes it possible to halve the switching losses of the switches of the half-bridges 1 and 2.
While running during the buck state we have Vo=Di*Vi; if we let Vh be the amplitude of the triangular wave we have Di=e1/Vh where e1 is the integrated error in input to the PWM block 40. If the amplitude Vh is a function of the input voltage Vi, we have Vh=Vi/K and Vo=K*e1. During the boost state we have Vo=Vi/Do=Vh*Vi/e1=Vi2/(K*e1), therefore the output voltage Vo varies instantaneously with every variation of the square of the input voltage Vi.
The PWM block 40 transforms the integrated error e1 into a pair of duty cycles Di, Do to drive the half-bridges 1 and 2. The duty cycle Di is generally produced by comparing the integrated error e1 directly with a saw-tooth wave. The duty cycle Do instead is constructed by comparing a signal e2, which is a function of the integrated error e1, with the triangular wave produced by the generator 41. The function from which this signal is generated depends on the type of driving chosen. In the case of the optimum efficiency condition it is very important that when the signal e1 exceeds the amplitude of the triangular wave, the signal e2 starts to cross it. There should be only one point at which the duty cycles D1, Do are at 100%; if this does not happen a case may arise in which for a certain range of the ratio Vo/Vi the half-bridges 1 and 2 either switch simultaneously, reducing the efficiency of the regulator, or neither one of the half-bridges switches and this could cause undesired oscillations in the output voltage Vo.
FIG. 2 shows a typical block diagram of a buck-boost regulator operating in voltage mode. The error given by the difference between the feedback voltage Vfb given by K*Vo and the reference voltage Vref is sent in input to a compensation block characterized by the transfer function Fcomp. The output signal e1, which is the integrated error, is sent to a block having a transfer function Fe and capable of producing the duty cycles Di and Do. Said duty cycles are in input to the block of the converter having the transfer function
  Vi      1    +                  s        2            ⁢      LC      ⁢              /            ⁢      Do      and which serves to produce the voltage Vo. To make the system linear while running we let Vo/Vi=Vi/(K*e1) and thus obtain
  Fe  =                    k        ·                  Vo          2                            Vi        3              .  
In the buck state the transfer function Fe=K/Vi; thus the voltages Vi and Vo do not enter any block of the diagram and therefore the gain of the loop is independent of the input and output values.
In the boost state the function Fe is no longer linear and can be expressed as follows:
  Fe  =            Vi              k        ·                              e            ⁢            1                    2                      .  Therefore the gain of the loop varies with the square of the ratio Vo/Vi and is greater than the gain in the buck state. The double pole of the filter LC is shifted to lower frequencies. The increase in the gain and the shift to the lower frequencies of the double pole are factors that contribute to worsening the stability of the system. This translates in practical terms as having to create compensation networks that take these variations into account. In particular in a compensation system with a dominant pole it is necessary to ensure the stability in the worst conditions or have a high output voltage and low input voltage which however makes the system over-compensated in the other conditions and therefore slower.